Pico-A=V range CMOS transconductors using series-parallel current division

Introduction: In recent years there has been considerable research effort in the development of integrated transconductance amplifiers (OTAs) with very small transconductance and improved linear range due mainly to their application in biomedical circuits and in neural networks [1]. Several OTA topologies have been developed to achieve transconductances in the order of a few nA=V with linear range up to 1 V [1–4]. The use of complex OTA architectures also increases noise, mismatch offset and transistor area, and results in design trade-offs [1]. Simple division of the output current of a differential pair by a high ratio has been widely considered an expensive technique in terms of area. However, the use of series–parallel division of current [4] in an OTA, as in Fig. 1, allows the implementation of an area efficient current divider. For the NMOS current mirrors in Fig. 1, N unity transistors M2 are placed in series or in parallel to achieve an effective output transconductance Gm: Gm 1⁄4 gm1 N 2 ð1Þ